1. Field of the Invention
The present invention relates to a semiconductor device and a fabrication method thereof, and more specifically, the present invention relates to a semiconductor device and a fabrication method thereof that prevent or at least plasma induced damage during the fabrication processes.
2. Description of the Related Art
In the semiconductor fabrication field, plasmas are generally used in various processes such as ion implantation process, chemical vapor deposition process, etching process and photoresist removing process and the like. Theoretically speaking, plasma should exhibit a neutral electrical property to the outside, that is, positive ions and negative ions of the plasma are of equal amount. However, due to an uneven distribution of plasmas, positive ions and negative ions that actually enter into a substrate are not of equal amount at some local areas, which consequently results in a great amount of dissociative charges. Conductors like polysilicon and metal wirings on the substrate would collect these dissociative charges like an antenna, and charges may easily be accumulated on substrate surface. Such charge accumulation may affect the performance of a gate insulation layer, causing various electric parameters (e.g. fixed charges in the insulation layer, interface state density, flat-band voltage, gate leakage current, or the like) of the gate insulation layer to be degraded, and even causing the device to be malfunctioned in extreme cases. This is called “plasma induced damage”.
In particular, in the back end of line (BEOL) of an integrated circuit fabrication flow, i.e., during the formation of metal interconnections, plasma induced damage easily occurs because of the use of dielectric chemical vapor deposition (DCVD) process, etching process and physical vapour deposition (PVD) process and the like.
In light of the above problems, it is desirable to provide a semiconductor device structure and a fabrication method thereof to eliminate or reduce plasma induced damage, thereby enhancing the reliability of the semiconductor device.